IC697MEM735 | 32-bit CMOS extended memory Added chip to expand capacity
Brand: GE Fanuc
Series: 90-70 series
Part number: IC697MEM735
Type: 32-bit CMOS extended memory
Shelf life: 10 years at 20 degrees Celsius (68 degrees Fahrenheit)
Memory retention: 6 months nominal no external power supply
Compatible: CPU 780, 781, 782, 788, and 789 cpus
Categories: GE
Tags: IC697MEM735
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Product content
Brand: GE Fanuc
Series: 90-70 series
Part number: IC697MEM735
Type: 32-bit CMOS extended memory
Shelf life: 10 years at 20 degrees Celsius (68 degrees Fahrenheit)
Memory retention: 6 months nominal no external power supply
Compatible: CPU 780, 781, 782, 788, and 789 cpus
Additional slot for installation: not required
Lithium battery: Supported
Rating: VME standard
IC697MEM735 extended memory is mainly to expand the storage capacity by increasing the number of memory chips, because the capacity of a single memory chip is limited, it is difficult to meet the actual needs. There are two main ways to expand memory: bit expansion and word expansion, and the case of both word and bit expansion.
Bit expansion: In in-place expansion, the bits of multiple memory chips need to be added together to increase the number of data lines. In this way, two chips share the same chip selection signal and are selected at the same time, each chip reads or writes a certain number of bits of data, and the two chips together are higher bits of data.
Word expansion: IC697MEM735 word expansion is in the direction of word expansion, that is, in the case of constant chip bits, increase the chip to expand the capacity. This mainly involves the connection of the address line, the connection of the read and write signal and the address range of the chip.
Word and bit expansion: This is to consider the case of bit expansion and word expansion at the same time, and increase the number of bits and the number of memory chips according to actual needs.
For specific implementation methods, such as specific devices such as 51 single chip computers, the way of expanding memory may be different. For example, in 51 MCU, because fetching instructions and fetching data are carried out separately, the address line can be shared without conflict. When scaling, specific ports (such as P0 and P2) can be used as address lines, while also taking into account factors such as address latches.
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