VE4012S2B2 RSC6218A LLC Resonant Power Supply Case Sharing -REASUNOS(RISen Semiconductor)
I. Introduction
RSC6218A is an excellent product that can meet four standards: ① The “Architectural Lighting Design Standard” GBT0034-2024 to be implemented on August 1, 2024; (2) The Electromagnetic Compatibility Limit Part 1: Harmonic current emission limit (Equipment input current per phase ≤16A) implemented from July 1, 2024 GB17625.1-2022; (3) The implemented educational lighting standard: GB/T 36876-2018; ④ the new EU ERP EU2019/2020 has been implemented; This article is to share the application of RSC6218A design 18W high efficiency power driver case.
VE4012S2B2 RSC6218A LLC resonant power supply case sharing – Figure 1 of REASUNOS(Rising Semiconductor)
Ii. RSC6218A 18W Case
RSC6218A LLC resonant power supply case sharing – Figure 2 of REASUNOS(Rising Semiconductor)
The switching characteristics of the switching power supply will make the MOS of the power supply and the transformer produce electromagnetic compatibility interference, excellent PCB Layout can solve the electromagnetic compatibility problem, but also can effectively avoid the expansion of interference sources; The figure illustrates the key points of PCB design of RSC6218A series LLC resonant power supply solution with examples, and improves the stability of LLC resonant solution.
1.VE4012S2B2 Strictly follow the principle of separation of power “ground” and signal “ground”, and the ground single point of CS resistance in the example shown in the figure is connected to the negative end of high-voltage electrolysis CE1; Note: ① The “ground” of the chip AGND and FB lower bias resistance first return to the capacitor C5 “ground” of VCC, and then return to the negative end of CE1; The PGND of the chip is connected to the negative end of CE1 in a single point;
2, reduce the area of the main power loop, including the resonator loop, switching power loop, load current loop, can effectively reduce the expansion of interference sources; The part of the thickened line in the example shown in the figure is copper foil;
3, the attention point of the self-lifting voltage loop, the joint point of the bootstrap diode and capacitor is close to the HB pin of PIN10, which can avoid the introduction of external interference and affect the steady-state operation of the system;
4. VE4012S2B2 The node of the sampling resistance and filtering capacitor of the FB pin must be close to the FB pin of the chip PIN14, otherwise the OVP point and the pulled-load voltage point will be affected, and the stability of the system will be affected;
5, the sampling resistance R11 of the CS pin should be close to the CS pin of the chip PIN15, and away from the high di/dt of the line, to reduce the instability of the constant current point;
6, VE4012S2B2 when the radiator is used, the radiator will have high-frequency current flow, so the radiator should be nearby “ground”, which can reduce the expansion of interference sources;
7, the PCB on the back of the chip is directly above the chip as far as possible not TO place devices with a high dynamic voltage difference with the “ground” of the chip, such as transformers, lying down and the large plane close to the PCB facing down the TO-220 package MOSFETs;
8. VE4012S2B2 The position of resonant inductor and current transformer in the line can be adjusted, and the LAYOUT can be placed according to the actual wiring needs, which is convenient for line sampling and product stability.